Design and simulate BGR, layout with IO pad placement, verify with Calibre, and explore test and measurement techniques at the lab with a visit.
Learning Outcome
- Acquire skills in the schematic design of BGR circuits using Cadence Design Software
- Analyse and simulate the performance of BGR circuits for accuracy and reliability
- Master Layout Techniques: Learn effective layout design methodologies for BGR circuits using Cadence Design Software
- Understand and implement correct IO pad placement for optimal circuit performance
- Apply verification techniques using Calibre by Mentor Graphics to ensure design integrity
- Gain insights into test and measurement processes used in industry
Methodology
This course will be conducted in a workshop fashion, whereby the basic theory and concepts will be presented, followed by hands-on practice and exercises.
Pre-requisite
- Basic knowledge of electronic circuits and semiconductor devices
- Familiarity with analog design principles
- Basic understanding of Cadence Design Software
Duration
3 Days
Target Group (who should attend)
- Electrical and electronic engineering students
- Practising engineers and professionals in the semiconductor industry
- Researchers and academicians interested in analog IC design
Day 1
- Schematic Design of BGR
- Simulation
- Layout Technique using Cadence Design Software
Day 2
- IO Pad Placement
- Verification using Calibre by Mentor Graphics
Day 3
- Introduction to Test & Measurement at lab
- Visit Test & Measurement Lab
